Somasekhar and Roy : Differential Current Switch Logic 3 Done

| A new logic family, Diierential Current Switch Logic (DCSL) for implementing clocked CMOS circuits has been developed. DCSL is in principle a clocked diieren-tial cascode voltage switch logic circuit (DCVS). The circuit topology outlines a generic method for reducing internal node swings in clocked DCVS logic circuits. In comparison to other forms of clocked DCVS, DCSL achieves better performance both in terms of power and speed by restricting internal voltage swings in the NMOS tree. DCSL circuits are capable of implementing high complexity high fan-in gates without compromising gate delay. Automatic lock-out of inputs on completion of evaluation is a novel feature of the circuit. Three forms of DCSL circuits have been developed with varying beneets in speed and power. SPICE simulations of circuits designed using the 1:2 MOSIS SC-MOS process indicate a factor of two improvement in speed and power over comparable DCVS gates, for moderate tree heights.